The Y86 instruction-set architecture is not intended to be a full processor implementation, but rather to provide the starting point for a working model of how microprocessors are designed and implemented, and, so, the architecture is quite simple.
In the Y86 instruction-set architecture, instruction encoding results in instructions that are between 1 and 6 bytes long, depending on which instruction fields are required. Instructions consists of an initial byte, identifying the instruction, an optional register specifier byte, and an option four-byte constant word.
In the instruction encoding, integers have a little-endian encoding, where bytes appear in reverse order. However, in registers and memory integers are treated as big-endian numbers, with bytes appearing in normal order, which can be a little confusing and potentially tricky if you generate self-modifying code. Read more about this here.
The following is a compact reference library for the Y86 instruction-set architecture
For a discussion of the swap of the opcodes for the halt instruction and the nop instructions, read this posting.
For a discussion of the conditional move instructions, read this posting.